Energy-Aware Memory Management for Embedded Multimedia Systems | Agenda Bookshop Skip to content
address generation
Age Group_Uncategorized
Age Group_Uncategorized
Array Elements
Array Reference
automatic-update
B01=Dhiraj K. Pradhan
B01=Florin Balasa
Body Bias
Category1=Non-Fiction
Category=UMB
Category=UYD
Category=UYF
computer-aided design (CAD)
Convex Union
COP=United States
data-dependence analysis
Delivery_Delivery within 10-20 working days
Dual Port Memory
Dynamic Energy
Dynamic Energy Consumption
electronic design automation
Embedded Multimedia Systems
Embedded Systems
Energy-Aware Memory Management
energy-efficient port assignment
eq_computing
eq_isMigrated=2
eq_non-fiction
Gate Leakage
HNF
Iteration Domain
Iterator Vector
Language_English
Leakage Power
Loop Nest
Memory Architecture
memory banking
memory size estimation
memory subsystem
Multiport Memories
PA=Available
Pareto Solutions
Power Consumption
Price_€100 and above
PS=Active
RBB
Register Allocation
RISC Processor
Scratch Pad Memory
Signal Mapping
Sleep Transistor
softlaunch
SRAM Memory
Statement S1
Subthreshold Leakage
Threshold Voltage

Energy-Aware Memory Management for Embedded Multimedia Systems

English

Energy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach presents recent computer-aided design (CAD) ideas that address memory management tasks, particularly the optimization of energy consumption in the memory subsystem. It explains how to efficiently implement CAD solutions, including theoretical methods and novel algorithms.

The book covers various energy-aware design techniques, including data-dependence analysis techniques, memory size estimation methods, extensions of mapping approaches, and memory banking approaches. It shows how these techniques are used to evaluate the data storage of an application, reduce dynamic and static energy consumption, design energy-efficient address generation units, and much more.

Providing an algebraic framework for memory management tasks, this book illustrates how to optimize energy consumption in memory subsystems using CAD solutions. The algorithmic style of the text should help electronic design automation (EDA) researchers and tool developers create prototype software tools for system-level exploration, with the goal to ultimately obtain an optimized architectural solution of the memory subsystem.

See more
€235.60
address generationAge Group_UncategorizedArray ElementsArray Referenceautomatic-updateB01=Dhiraj K. PradhanB01=Florin BalasaBody BiasCategory1=Non-FictionCategory=UMBCategory=UYDCategory=UYFcomputer-aided design (CAD)Convex UnionCOP=United Statesdata-dependence analysisDelivery_Delivery within 10-20 working daysDual Port MemoryDynamic EnergyDynamic Energy Consumptionelectronic design automationEmbedded Multimedia SystemsEmbedded SystemsEnergy-Aware Memory Managementenergy-efficient port assignmenteq_computingeq_isMigrated=2eq_non-fictionGate LeakageHNFIteration DomainIterator VectorLanguage_EnglishLeakage PowerLoop NestMemory Architecturememory bankingmemory size estimationmemory subsystemMultiport MemoriesPA=AvailablePareto SolutionsPower ConsumptionPrice_€100 and abovePS=ActiveRBBRegister AllocationRISC ProcessorScratch Pad MemorySignal MappingSleep TransistorsoftlaunchSRAM MemoryStatement S1Subthreshold LeakageThreshold Voltage
Delivery/Collection within 10-20 working days
Product Details
  • Weight: 657g
  • Dimensions: 156 x 234mm
  • Publication Date: 16 Nov 2011
  • Publisher: Taylor & Francis Inc
  • Publication City/Country: US
  • Language: English
  • ISBN13: 9781439814000

About

Florin Balasa is an associate professor in the Department of Computer Science and Engineering at the American University in Cairo. A senior member of IEEE, Dr. Balasa holds two patents and is an associate editor of the International Journal of Computers and Electrical Engineering. He has also been a recipient of a National Science Foundation CAREER Award. His research focuses on algorithms and software systems for VLSI design automation.

Dhiraj K. Pradhan is a chair and professor in the Department of Computer Science at the University of Bristol. A fellow of ACM, IEEE, and the Japan Society of Promotion of Science, Dr. Pradhan holds two patents and has been a recipient of the Humboldt Prize and Fulbright-Flad Chair in Computer Science. For more than thirty years, his research has focused on VLSI computer-aided design and testing as well as fault-tolerant computing, computer architecture, and parallel processing.

Customer Reviews

Be the first to write a review
0%
(0)
0%
(0)
0%
(0)
0%
(0)
0%
(0)
We use cookies to ensure that we give you the best experience on our website. If you continue we'll assume that you are understand this. Learn more
Accept