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Autonomic Networking-on-Chip

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A Bio-Inspired Architecture for Autonomic Network-on-Chip
adaptive hardware architectures
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B01=Phan Cong-Vinh
Bio-Inspired NoC Architecture Optimization
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Buffer Allocation
Buffer Utilization
C1 C2 C3
Category1=Non-Fiction
Category=THR
Category=TJFC
Category=TQ
Category=UB
Category=UY
Category=UYD
Clock Domains
Clock Frequency
Clock Gating
Cluster Agent
Code Resource
context-aware network computing
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DC Converter
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DVS
Dynamic Power Management
embedded systems
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eq_computing
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eq_isMigrated=2
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evolutionary algorithms
Evolutionary Design of Collective Communications on Wormhole NoCs
Execution Times
formal verification
Identity Morphism
Injection Rate Increases
Language_English
Leakage Power
Memory Units
Monitoring Operations
Natural Isomorphism
NoC Architecture
PA=Available
Parallel Composition
parallel computing
Platform Agent
Power Consumption
Price_€100 and above
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Self-Adaption in SoCs
softlaunch
system-on-chip design
Toward Self-Placing Applications on 2D and 3D NoCs
VC

Product details

  • ISBN 9781439829110
  • Weight: 638g
  • Dimensions: 156 x 234mm
  • Publication Date: 07 Dec 2011
  • Publisher: Taylor & Francis Inc
  • Publication City/Country: US
  • Product Form: Hardback
  • Language: English
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Description

Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system.

The FIRST Book to Assess Research Results, Opportunities, & Trends in "BioChipNets"

The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent researchers in industry and academia around the world. A response to the critical need for a global information exchange and dialogue, it is written for engineers, scientists, practitioners, and other researchers who have a basic understanding of NoC and are now ready to learn how to specify, develop, and verify ANoC using rigorous approaches.

Offers Expert Insights Into Technical Topics Including:

    • Bio-inspired NoC
      • How to map applications onto ANoC
        • ANoC for FPGAs and structured ASICs
          • Methods to apply formal methods in ANoC development
            • Ways to formalize languages that enable ANoC
              • Methods to validate and verify techniques for ANoC
                • Use of "self-" processes in ANoC (self-organization, configuration, healing, optimization, protection, etc.)
                  • Use of calculi for reasoning about context awareness and programming models in ANoC

                    With illustrative figures to simplify contents and enhance understanding, this resource contains original, peer-reviewed chapters reporting on new developments and opportunities, emerging trends, and open research problems of interest to both the autonomic computing and network-on-chip communities. Coverage includes state-of-the-art ANoC architectures, protocols, technologies, and applications. This volume thoroughly explores the theory behind ANoC to illustrate strategies that enable readers to use formal ANoC methods yet still make sound judgments and allow for reasonable justifications in practice.

                    About

                    Phan Cong-Vinh received a Ph.D in computer science from London South Bank University (LSBU) in the United Kingdom, a BS in mathematics and an MS in computer science from Vietnam National University (VNU) in Ho Chi Minh City, and a BA in English from Hanoi University of Foreign Languages Studies in Vietnam. He finished his PhD dissertation with the title Formal Aspects of Dynamic Reconfigurability in Reconfigurable Computing Systems supervised by Prof. Jonathan P. Bowen at LSBU where he was affiliated with the Centre for Applied Formal Methods (CAFM) at the Institute for Computing Research (ICR). From 1983 to 2000, he was a lecturer in mathematics and computer science at VNU, Posts and Telecommunications Institute of Technology (PTIT) and several other universities in Vietnam before he joined research with Dr. Tomasz Janowski at the International Institute for Software Technology (IIST) in Macao SAR, China, as a fellow in 2000. His research interests center on all aspects of formal methods, autonomic computing and networking, reconfigurable computing, ubiquitous computing, and applied categorical structures in computer science.