Home » Communication Architectures for Systems-on-Chip
Product Image

Communication Architectures for Systems-on-Chip

€272.80
Quantity:
In stock with our UK publisher. 14-28 days
Delivery/Collection within 10-20 working days
14 days return policy Shipping & Delivery
advanced on-chip communication architectures
Age Group_Uncategorized
Age Group_Uncategorized
automatic-update
automation
B01=José L. Ayala
carbon nanotube interconnects
Category1=Non-Fiction
Category=THR
Category=TJFC
Category=TQ
Category=UB
Category=UT
Category=UYD
Category=UYF
channel
controller
COP=United States
Delivery_Delivery within 10-20 working days
design
EDP
electronic
embedded systems security
eq_bestseller
eq_computing
eq_isMigrated=0
eq_isMigrated=2
eq_nobargain
eq_non-fiction
field
FSOI
gate
Hierarchical Topology
hybrid network topologies
IP Core
Language_English
Logic Styles
memory
multiprocessor data transfer
MZI Modulator
NoC Architecture
NoC Topology
OCP
optical communication protocols
Optical Interconnects
PA Attack
PA=Available
Pennsylvania State University
Power Consumption
Power Traces
Precharge Phase
Price_€100 and above
programmable
PS=Active
Routing Algorithm
Sensitive Information
Si Nanowires
Side Channel Attacks
Silicon Waveguides
SiNW
SoC Design
softlaunch
Submicron Complementary Metal Oxide Semiconductor
transaction protection mechanisms
VC
virtual
Worst Case Latency

Product details

  • ISBN 9781439841709
  • Weight: 782g
  • Dimensions: 156 x 234mm
  • Publication Date: 14 Mar 2011
  • Publisher: Taylor & Francis Inc
  • Publication City/Country: US
  • Product Form: Hardback
  • Language: English
Secure checkout Fast Shipping Easy returns
Description

A presentation of state-of-the-art approaches from an industrial applications perspective, Communication Architectures for Systems-on-Chip shows professionals, researchers, and students how to attack the problem of data communication in the manufacture of SoC architectures.

With its lucid illustration of current trends and research improving the performance, quality, and reliability of transactions, this is an essential reference for anyone dealing with communication mechanisms for embedded systems, systems-on-chip, and multiprocessor architectures—or trying to overcome existing limitations. Exploring architectures currently implemented in manufactured SoCs—and those being proposed—this book analyzes a wide range of applications, including:

  • Well-established communication buses

  • Less common networks-on-chip

  • Modern technologies that include the use of carbon nanotubes (CNTs)

  • Optical links used to speed up data transfer and boost both security and quality of service (QoS)

The book’s contributors pay special attention to newer problems, including how to protect transactions of critical on-chip information (personal data, security keys, etc.) from an external attack. They examine mechanisms, revise communication protocols involved, and analyze overall impact on system performance.
About

Jose L. Ayala got a M.S. in Telecommunications Engineering from Politecnica University of Madrid in 2001, and a M.S. in Physics from the Open University of Spain in 2002. After that, he pursued his Ph.D on Electronic Engineering at the Department of Electrical Engineering of the Politecnica University of Madrid. He is currently an Associate Professor at the Department of Computer Architecture of the Complutense University of Madrid.