Product details
- ISBN 9781439895832
- Weight: 1224g
- Dimensions: 178 x 254mm
- Publication Date: 29 Oct 2014
- Publisher: Taylor & Francis Inc
- Publication City/Country: US
- Product Form: Hardback
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Beginning with an introduction to cryptography, Hardware Security: Design, Threats, and Safeguards explains the underlying mathematical principles needed to design complex cryptographic algorithms. It then presents efficient cryptographic algorithm implementation methods, along with state-of-the-art research and strategies for the design of very large scale integrated (VLSI) circuits and symmetric cryptosystems, complete with examples of Advanced Encryption Standard (AES) ciphers, asymmetric ciphers, and elliptic curve cryptography (ECC).
Gain a Comprehensive Understanding of Hardware Security—from Fundamentals to Practical Applications
Since most implementations of standard cryptographic algorithms leak information that can be exploited by adversaries to gather knowledge about secret encryption keys, Hardware Security: Design, Threats, and Safeguards:
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- Details algorithmic- and circuit-level countermeasures for attacks based on power, timing, fault, cache, and scan chain analysis
- Describes hardware intellectual property piracy and protection techniques at different levels of abstraction based on watermarking
- Discusses hardware obfuscation and physically unclonable functions (PUFs), as well as Trojan modeling, taxonomy, detection, and prevention
Design for Security and Meet Real-Time Requirements
If you consider security as critical a metric for integrated circuits (ICs) as power, area, and performance, you’ll embrace the design-for-security methodology of Hardware Security: Design, Threats, and Safeguards.
Dr. Debdeep Mukhopadhyay is an associate professor at the Indian Institute of Technology (IIT) Kharagpur, West Bengal, where he has been instrumental in setting up a side channel analysis laboratory. Previously, he worked as an assistant professor at the IIT Kharagpur and Madras. His research interests include VLSI of cryptographic algorithms and side channel analysis. A popular invited speaker, he has authored around 100 international conference and journal papers, co-authored a textbook on cryptography and network security, reviewed and served on program committees for several international conferences, and collaborated with several organizations including ISRO, DIT, ITI, DRDO, and NTT-Labs Japan. He has been the recipient of the prestigious INSA Young Scientist Award and the INAE Young Engineer Award.
Dr. Rajat Subhra Chakraborty is an assistant professor at the Indian Institute of Technology Kharagpur, West Bengal. Previously, he worked as a CAD software engineer at National Semiconductor, Bangalore, Karnataka, India and a co-op at Advanced Micro Devices, Sunnyvale, California, USA. His research interests include design methodology for hardware IPIIC protection, hardware Trojan detection/prevention through design and testing, attacks on hardware implementation of cryptographic algorithms, and reversible watermarking for digital content protection. He has authored over 25 conference and journal publications and presented at numerous events including the 2011 IEEE VLSI Design Conference, where he delivered a tutorial on hardware security.
