High-Performance Backbone Network Technology

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advanced switching devices
Atm
Atm Cell
ATM Forum
Atm Network
Atm Switch
BER
Category=KNV
Cell Arrival
Cell Loss Probability
CLR.
content delivery network
Delay Bound
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eq_business-finance-law
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eq_nobargain
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graduate research guide
high performance backbone network
IP Packet
IP Routing
network reliability
NRZ.
NTT.
optical networking
Output Buffer
Output Port
PCR
photonic backbone network design
quality-of-service
real-time communications
Router Network
SOA
Switch Architecture
Switching Fabric
traffic engineering
VBR.
virtual path
Wavelength Conversion
WDM Network

Product details

  • ISBN 9780824753214
  • Weight: 2658g
  • Dimensions: 210 x 280mm
  • Publication Date: 05 May 2004
  • Publisher: Taylor & Francis Inc
  • Publication City/Country: US
  • Product Form: Hardback
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Compiling the most influential papers from the IEICE Transactions in Communications, High-Performance Backbone Network Technology examines critical breakthroughs in the design and provision of effective public service networks in areas including traffic control, telephone service, real-time video transfer, voice and image transmission for a content delivery network (CDN), and Internet access. The contributors explore system structures, experimental prototypes, and field trials that herald the development of new IP networks that offer quality-of-service (QoS), as well as enhanced security, reliability, and function. Offers many hints and guidelines for future research in IP and photonic backbone network technologies
NAOAKI YAMANAKA is Senior Research Engineer, Supervisor, and Research Group Leader, NT Network Innovation Laboratories, Tokyo. Japan. He has more than 20 years of backbone research and development experience and is the recipient of several awards given by the Institute of Electrical and Electronics Engineers (IEEE) for best transaction paper and best conference paper. The author of numerous professional publications, Dr. Yamanaka is technical editor of IEEE Communications Magazine, Broadband Network Area Editor of IEEE Communications Surveys & Tutorials, and editor of !EICE Transactions, as well as TAC Chair of the Asia Pacific Board of the IEEE Communications Society. Dr. Yamanaka is a Fellow of the IEEE and a member of the Institute of Electronics, Information and Communication Engineers (IEICE). He received the B.E. (1981), M.E. (1983), and Ph.D. (1991) degrees in engineering from Keio University, Japan.