Memory Management for Synthesis of DSP Software
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A01=Praveen K. Murthy
A01=Shuvra S. Bhattacharyya
advanced DSP software memory management
Author_Praveen K. Murthy
Author_Shuvra S. Bhattacharyya
Buffer Cost
buffer sharing algorithms
Category=UMZ
Chromatic Number
Coarse Grained Model
Composite Firing
computational memory minimization
Dataflow Graph
Dataflow Model
digital signal processing optimization
DSP Architecture
dynamic storage allocation
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Execution Time
Fir Filter
Input Buffer
Input Edge
Interval Graphs
Lifetime Analysis
Maximum Weight Matching
Minimum Buffer
Output Buffers
Output Edge
Register Allocation
Relative Vectorization Degree
Repetitions Vector
SCC
SDF
software synthesis techniques
synchronous dataflow modeling
Topological Sort
Valid Schedule
VLIW Architecture
Product details
- ISBN 9780849337529
- Weight: 572g
- Dimensions: 156 x 234mm
- Publication Date: 20 Mar 2006
- Publisher: Taylor & Francis Inc
- Publication City/Country: US
- Product Form: Hardback
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Although programming in memory-restricted environments is never easy, this holds especially true for digital signal processing (DSP). The data-rich, computation-intensive nature of DSP makes memory management a chief and challenging concern for designers. Memory Management for Synthesis of DSP Software focuses on minimizing memory requirements during the synthesis of DSP software from dataflow representations. Dataflow representations are used in many popular DSP design tools, and the methods of this book can be applied in that context, as well as other contexts where dataflow is used.
This book systematically reviews research conducted by the authors on memory minimization techniques for compiling synchronous dataflow (SDF) specifications. Beginning with an overview of the foundations of software synthesis techniques from SDF descriptions, it examines aggressive buffer-sharing techniques that take advantage of specific and quantifiable tradeoffs between code size and buffer size to achieve high levels of buffer memory optimization.
The authors outline coarse-level strategies using lifetime analysis and dynamic storage allocation (DSA) for efficient buffer sharing as one approach and demonstrate the role of the CBP (consumed-before-produced) parameter at a finer level using a merging framework for buffer sharing. They present two powerful algorithms for combining these sharing techniques and then introduce techniques that are not restricted to the single appearance scheduling space of the other techniques.
Extensively illustrated to clarify the mathematical concepts, Memory Management for Synthesis of DSP Software presents a comprehensive survey of state-of-the-art research in DSP software synthesis.
Praveen K. Murthy, Shuvra S. Bhattacharyya
