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Verification of Systems and Circuits Using LOTOS, Petri Nets, and CCS

Michael Yoeli | Rakefet Kol
€129.99
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A01=Michael Yoeli
A01=Rakefet Kol
application
asynchronous
Author_Michael Yoeli
Author_Rakefet Kol
book
cadp
Category=UMZ
circuits
digital
eq_bestseller
eq_computing
eq_isMigrated=1
eq_isMigrated=2
eq_nobargain
eq_non-fiction
formal
guide
interactive
introduction
lotosbased
modular
offers
powerful
practical book
stepbystep
theoretical background
three
toolsets
verification

Product details

  • ISBN 9780471704492
  • Weight: 544g
  • Dimensions: 163 x 243mm
  • Publication Date: 15 Apr 2008
  • Publisher: John Wiley & Sons Inc
  • Publication City/Country: US
  • Product Form: Hardback
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Description
A Step-by-Step Guide to Verification of Digital Systems

This practical book provides a step-by-step, interactive introduction to formal verification of systems and circuits. The book offers theoretical background and introduces the application of three powerful verification toolsets: LOTOS-based CADP, Petri nets–based PETRIFY, and CCS-based CWB. The book covers verification of modular asynchronous circuits, alternating-bit protocols, arbiters, pipeline controllers, up-down counters, and phase converters, as well as many other verification examples.

Using the given detailed examples, exercises, and easy-to-follow tutorials, complete with the downloadable toolsets available via referenced Web sites, this book serves as an ideal text in advanced undergraduate and graduate courses in computer science and electrical engineering. It is also valuable as a desktop reference for practicing verification engineers who are interested in verifying that designed digital systems meet specifications and requirements.
About Michael Yoeli | Rakefet Kol
Michael Yoeli, PhD, is Professor Emeritus in the Department of Computer Science, Technion, Israel. He is the author or editor of several books on digital networks and formal verification. His research interests include theory and applications of Petri nets, formal verification of hardware design, formal verification and synthesis of modular asynchronous networks, and computer-assisted analysis of parallel systems. He was awarded a Certificate of Acknowledgment by the Israel Section of the IEEE and the Israel Chapter of the IEEE Computer Society.

Rakefet Kol, PhD, is a member of the Electrical Engineering Department, Technion, Israel. Her research interests include computer architectures, asynchronous design, formal verification of hardware designs, and software engineering. She is a senior member of the IEEE and a professional member of the ACM.

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