A01=Joseph Cavanagh
advanced verilog modeling examples
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Asynchronous Sequential Machine
Author_Joseph Cavanagh
bench
Category=UMX
Category=UYD
clk
Continuous Assignment
Continuous Assignment Statement
Dataflow Modeling
digital logic circuits
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finite state machine design
Flow Table
Full Adder
Half Adder
hardware description language
input
Intrastatement Delays
karnaugh
Karnaugh Map
Logic Diagram
logic synthesis techniques
map
Merged Flow Table
Merger Diagram
Minterm Location
module
Modulo-16 Counter
Moore Machine
Moore Pulse Mode Asynchronous Sequential Machine
Moore Synchronous Sequential Machine
Nonblocking Assignments
output
posedge
Primitive Flow Table
Pulse Mode Asynchronous Sequential Machine
sequential circuit analysis
simulation waveform analysis
SR Latch
Synchronous Sequential Machines
test
Test Bench
Test Bench Module
UDPs
Product details
- ISBN 9781420051544
- Weight: 1750g
- Dimensions: 178 x 254mm
- Publication Date: 20 Feb 2007
- Publisher: Taylor & Francis Inc
- Publication City/Country: US
- Product Form: Hardback
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Emphasizing the detailed design of various Verilog projects, Verilog HDL: Digital Design and Modeling offers students a firm foundation on the subject matter. The textbook presents the complete Verilog language by describing different modeling constructs supported by Verilog and by providing numerous design examples and problems in each chapter. Examples include counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and much more. The text also contains information on synchronous and asynchronous sequential machines, including pulse-mode asynchronous sequential machines.
In addition, it provides descriptions of the design module, the test bench module, the outputs obtained from the simulator, and the waveforms obtained from the simulator illustrating the complete functional operation of the design. Where applicable, a detailed review of the topic's theory is presented together with logic design principles, including state diagrams, Karnaugh maps, equations, and the logic diagram.
Verilog HDL: Digital Design and Modeling is a comprehensive, self-contained, and inclusive textbook that carries all designs through to completion, preparing students to thoroughly understand this popular hardware description language.
Santa Clara University, California, USA
