Adjacency Constraints
automated VLSI design workflow
behavioural hardware synthesis
Boolean Equations
Cad Framework
Category=UYF
Chip Planning
Connect Frame
digital circuit synthesis
Disjunctive Constraints
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Face Constraints
heuristic optimisation methods
hierarchical chip design
High Level HDLs
High Level Synthesis Tools
Input Constraints
Logic Compilers
Macro Cells
Mealy Machine
microarchitecture planning
Moore Machine
object oriented modelling
PLA
Random State Assignments
Schematic Diagram
Shape Functions
Silicon Compiler
State Transition Graph
State Transition Table
Stl 11
Symbolic Cover
Symbolic Minimization
Transistor Layout
Product details
- ISBN 9789056996673
- Weight: 710g
- Dimensions: 152 x 229mm
- Publication Date: 17 Apr 2000
- Publisher: Taylor & Francis Ltd
- Publication City/Country: GB
- Product Form: Hardback
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VLSI Design Environments investigates design alternatives such as object oriented data modelling. The difficulty of automating chip architecture designs is caused by the complexity of the problem. The explosion of design decions make a heuristic approach necessary. PLAYOUT aims at the solution of system problems based on hierarchy, top-down planning, silicon complier presentations, advances in encoding logic synthesis and a microarchitecre and logic optimization system. PLAYOUT supports the physical design from entering the structure of digital systems to the generation of the mask. The concept for autonomous tools with a clear interface to the network description and the simple interface to the graphics is presented. This enables the designer to have a great influence on the configuration of the placement of the schematic diagram. Substantial progress is being made in behavioural and logic synthesis, both of which depend upon specifications.
