Reconfigurable Obfuscation Techniques for the IC Supply Chain: Using FPGA-like Schemes for Protection of Intellectual Property | Agenda Bookshop Skip to content
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A01=Samuel Pagliarini
A01=Zain Ul Abideen
Age Group_Uncategorized
Age Group_Uncategorized
Author_Samuel Pagliarini
Author_Zain Ul Abideen
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Category1=Non-Fiction
Category=TJFC
Category=UKM
Category=UYF
COP=Switzerland
Delivery_Pre-order
Language_English
PA=Not yet available
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Reconfigurable Obfuscation Techniques for the IC Supply Chain: Using FPGA-like Schemes for Protection of Intellectual Property

English

By (author): Samuel Pagliarini Zain Ul Abideen

This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.   

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A01=Samuel PagliariniA01=Zain Ul AbideenAge Group_UncategorizedAuthor_Samuel PagliariniAuthor_Zain Ul Abideenautomatic-updateCategory1=Non-FictionCategory=TJFCCategory=UKMCategory=UYFCOP=SwitzerlandDelivery_Pre-orderLanguage_EnglishPA=Not yet availablePrice_€50 to €100PS=Forthcomingsoftlaunch

Will deliver when available. Publication date 26 Dec 2024

Product Details
  • Dimensions: 168 x 240mm
  • Publication Date: 26 Dec 2024
  • Publisher: Springer International Publishing AG
  • Publication City/Country: Switzerland
  • Language: English
  • ISBN13: 9783031775086

About Samuel PagliariniZain Ul Abideen

Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech) Tallinn Estonia and his M.S. degree in computer engineering (Master in Integration Security and Trust in Embedded systems) from Grenoble Institute of Technology Grenoble France. He is currently a postdoctoral researcher at Carnegie Mellon University Pittsburgh PA USA. His research primarily focuses on ASIC design hardware security PUFs TRNGs reliable hardware designs and post-quantum cryptography. Samuel Pagliarini received his PhD from Telecom ParisTech Paris France in 2013. He has held research positions with the University of Bristol Bristol UK and Carnegie Mellon University Pittsburgh PA USA. From 2019 to 2023 he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn Estonia. He is currently a professor at Carnegie Mellon University Pittsburgh PA USA.

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